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Intel Core i3, i5, i7, i9 12xxx AlderLake support added
1 parent 2de410a commit f8fb8df

1 file changed

Lines changed: 46 additions & 37 deletions

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‎Hardware/CPU/IntelCPU.cs‎

Lines changed: 46 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,8 @@ private enum Microarchitecture {
2525
IceLake,
2626
CometLake,
2727
Tremont,
28-
TigerLake
28+
TigerLake,
29+
AlderLake,
2930
}
3031

3132
private readonly Sensor[] coreTemperatures;
@@ -48,9 +49,9 @@ private enum Microarchitecture {
4849
private const uint MSR_PP0_ENERY_STATUS = 0x639;
4950
private const uint MSR_PP1_ENERY_STATUS = 0x641;
5051

51-
private readonly uint[] energyStatusMSRs = { MSR_PKG_ENERY_STATUS,
52+
private readonly uint[] energyStatusMSRs = { MSR_PKG_ENERY_STATUS,
5253
MSR_PP0_ENERY_STATUS, MSR_PP1_ENERY_STATUS, MSR_DRAM_ENERGY_STATUS };
53-
private readonly string[] powerSensorLabels =
54+
private readonly string[] powerSensorLabels =
5455
{ "CPU Package", "CPU Cores", "CPU Graphics", "CPU DRAM" };
5556
private float energyUnitMultiplier = 0;
5657
private DateTime[] lastEnergyTime;
@@ -120,7 +121,7 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
120121
} break;
121122
case 0x1A: // Intel Core i7 LGA1366 (45nm)
122123
case 0x1E: // Intel Core i5, i7 LGA1156 (45nm)
123-
case 0x1F: // Intel Core i5, i7
124+
case 0x1F: // Intel Core i5, i7
124125
case 0x25: // Intel Core i3, i5, i7 LGA1156 (32nm)
125126
case 0x2C: // Intel Core i7 LGA1366 (32nm) 6 Core
126127
case 0x2E: // Intel Xeon Processor 7500 series (45nm)
@@ -138,11 +139,11 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
138139
microarchitecture = Microarchitecture.IvyBridge;
139140
tjMax = GetTjMaxFromMSR();
140141
break;
141-
case 0x3C: // Intel Core i5, i7 4xxx LGA1150 (22nm)
142+
case 0x3C: // Intel Core i5, i7 4xxx LGA1150 (22nm)
142143
case 0x3F: // Intel Xeon E5-2600/1600 v3, Core i7-59xx
143144
// LGA2011-v3, Haswell-E (22nm)
144145
case 0x45: // Intel Core i5, i7 4xxxU (22nm)
145-
case 0x46:
146+
case 0x46:
146147
microarchitecture = Microarchitecture.Haswell;
147148
tjMax = GetTjMaxFromMSR();
148149
break;
@@ -175,7 +176,7 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
175176
microarchitecture = Microarchitecture.Airmont;
176177
tjMax = GetTjMaxFromMSR();
177178
break;
178-
case 0x8E:
179+
case 0x8E:
179180
case 0x9E: // Intel Core i5, i7 7xxxx (14nm)
180181
microarchitecture = Microarchitecture.KabyLake;
181182
tjMax = GetTjMaxFromMSR();
@@ -193,8 +194,8 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
193194
microarchitecture = Microarchitecture.CannonLake;
194195
tjMax = GetTjMaxFromMSR();
195196
break;
196-
case 0x7D: // Intel Core i3, i5, i7 10xxGx (10nm)
197-
case 0x7E:
197+
case 0x7D: // Intel Core i3, i5, i7 10xxGx (10nm)
198+
case 0x7E:
198199
case 0x6A: // Intel Xeon (10nm)
199200
case 0x6C:
200201
microarchitecture = Microarchitecture.IceLake;
@@ -214,6 +215,11 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
214215
microarchitecture = Microarchitecture.TigerLake;
215216
tjMax = GetTjMaxFromMSR();
216217
break;
218+
case 0x97:
219+
case 0x9A: // Intel Core i3, i5, i7, i9 12xxx
220+
microarchitecture = Microarchitecture.AlderLake;
221+
tjMax = GetTjMaxFromMSR();
222+
break;
217223
default:
218224
microarchitecture = Microarchitecture.Unknown;
219225
tjMax = Floats(100);
@@ -257,7 +263,7 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
257263
case Microarchitecture.Nehalem:
258264
case Microarchitecture.SandyBridge:
259265
case Microarchitecture.IvyBridge:
260-
case Microarchitecture.Haswell:
266+
case Microarchitecture.Haswell:
261267
case Microarchitecture.Broadwell:
262268
case Microarchitecture.Silvermont:
263269
case Microarchitecture.Skylake:
@@ -269,31 +275,32 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
269275
case Microarchitecture.IceLake:
270276
case Microarchitecture.CometLake:
271277
case Microarchitecture.Tremont:
272-
case Microarchitecture.TigerLake: {
278+
case Microarchitecture.TigerLake:
279+
case Microarchitecture.AlderLake: {
273280
uint eax, edx;
274281
if (Ring0.Rdmsr(MSR_PLATFORM_INFO, out eax, out edx)) {
275282
timeStampCounterMultiplier = (eax >> 8) & 0xff;
276283
}
277-
} break;
278-
default:
284+
} break;
285+
default:
279286
timeStampCounterMultiplier = 0;
280287
break;
281288
}
282289

283290
// check if processor supports a digital thermal sensor at core level
284291
if (cpuid[0][0].Data.GetLength(0) > 6 &&
285-
(cpuid[0][0].Data[6, 0] & 1) != 0 &&
286-
microarchitecture != Microarchitecture.Unknown)
292+
(cpuid[0][0].Data[6, 0] & 1) != 0 &&
293+
microarchitecture != Microarchitecture.Unknown)
287294
{
288295
coreTemperatures = new Sensor[coreCount];
289296
for (int i = 0; i < coreTemperatures.Length; i++) {
290297
coreTemperatures[i] = new Sensor(CoreString(i), i,
291-
SensorType.Temperature, this, new[] {
298+
SensorType.Temperature, this, new[] {
292299
new ParameterDescription(
293-
"TjMax [°C]", "TjMax temperature of the core sensor.\n" +
294-
"Temperature = TjMax - TSlope * Value.", tjMax[i]),
295-
new ParameterDescription("TSlope [°C]",
296-
"Temperature slope of the digital thermal sensor.\n" +
300+
"TjMax [°C]", "TjMax temperature of the core sensor.\n" +
301+
"Temperature = TjMax - TSlope * Value.", tjMax[i]),
302+
new ParameterDescription("TSlope [°C]",
303+
"Temperature slope of the digital thermal sensor.\n" +
297304
"Temperature = TjMax - TSlope * Value.", 1)}, settings);
298305
ActivateSensor(coreTemperatures[i]);
299306
}
@@ -303,16 +310,16 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
303310

304311
// check if processor supports a digital thermal sensor at package level
305312
if (cpuid[0][0].Data.GetLength(0) > 6 &&
306-
(cpuid[0][0].Data[6, 0] & 0x40) != 0 &&
307-
microarchitecture != Microarchitecture.Unknown)
313+
(cpuid[0][0].Data[6, 0] & 0x40) != 0 &&
314+
microarchitecture != Microarchitecture.Unknown)
308315
{
309316
packageTemperature = new Sensor("CPU Package",
310-
coreTemperatures.Length, SensorType.Temperature, this, new[] {
317+
coreTemperatures.Length, SensorType.Temperature, this, new[] {
311318
new ParameterDescription(
312-
"TjMax [°C]", "TjMax temperature of the package sensor.\n" +
313-
"Temperature = TjMax - TSlope * Value.", tjMax[0]),
314-
new ParameterDescription("TSlope [°C]",
315-
"Temperature slope of the digital thermal sensor.\n" +
319+
"TjMax [°C]", "TjMax temperature of the package sensor.\n" +
320+
"Temperature = TjMax - TSlope * Value.", tjMax[0]),
321+
new ParameterDescription("TSlope [°C]",
322+
"Temperature slope of the digital thermal sensor.\n" +
316323
"Temperature = TjMax - TSlope * Value.", 1)}, settings);
317324
ActivateSensor(packageTemperature);
318325
}
@@ -329,18 +336,19 @@ public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
329336
if (microarchitecture == Microarchitecture.SandyBridge ||
330337
microarchitecture == Microarchitecture.IvyBridge ||
331338
microarchitecture == Microarchitecture.Haswell ||
332-
microarchitecture == Microarchitecture.Broadwell ||
339+
microarchitecture == Microarchitecture.Broadwell ||
333340
microarchitecture == Microarchitecture.Skylake ||
334341
microarchitecture == Microarchitecture.Silvermont ||
335342
microarchitecture == Microarchitecture.Airmont ||
336-
microarchitecture == Microarchitecture.KabyLake ||
343+
microarchitecture == Microarchitecture.KabyLake ||
337344
microarchitecture == Microarchitecture.Goldmont ||
338345
microarchitecture == Microarchitecture.GoldmontPlus ||
339346
microarchitecture == Microarchitecture.CannonLake ||
340347
microarchitecture == Microarchitecture.IceLake ||
341348
microarchitecture == Microarchitecture.CometLake ||
342349
microarchitecture == Microarchitecture.Tremont ||
343-
microarchitecture == Microarchitecture.TigerLake)
350+
microarchitecture == Microarchitecture.TigerLake ||
351+
microarchitecture == Microarchitecture.AlderLake)
344352
{
345353
powerSensors = new Sensor[energyStatusMSRs.Length];
346354
lastEnergyTime = new DateTime[energyStatusMSRs.Length];
@@ -410,7 +418,7 @@ public override void Update() {
410418
uint eax, edx;
411419
// if reading is valid
412420
if (Ring0.RdmsrTx(IA32_THERM_STATUS_MSR, out eax, out edx,
413-
cpuid[i][0].Affinity) && (eax & 0x80000000) != 0)
421+
cpuid[i][0].Affinity) && (eax & 0x80000000) != 0)
414422
{
415423
// get the dist from tjMax from bits 22:16
416424
float deltaT = ((eax & 0x007F0000) >> 16);
@@ -426,7 +434,7 @@ public override void Update() {
426434
uint eax, edx;
427435
// if reading is valid
428436
if (Ring0.RdmsrTx(IA32_PACKAGE_THERM_STATUS, out eax, out edx,
429-
cpuid[0][0].Affinity) && (eax & 0x80000000) != 0)
437+
cpuid[0][0].Affinity) && (eax & 0x80000000) != 0)
430438
{
431439
// get the dist from tjMax from bits 22:16
432440
float deltaT = ((eax & 0x007F0000) >> 16);
@@ -443,8 +451,8 @@ public override void Update() {
443451
uint eax, edx;
444452
for (int i = 0; i < coreClocks.Length; i++) {
445453
System.Threading.Thread.Sleep(1);
446-
if (Ring0.RdmsrTx(IA32_PERF_STATUS, out eax, out edx,
447-
cpuid[i][0].Affinity))
454+
if (Ring0.RdmsrTx(IA32_PERF_STATUS, out eax, out edx,
455+
cpuid[i][0].Affinity))
448456
{
449457
newBusClock =
450458
TimeStampCounterFrequency / timeStampCounterMultiplier;
@@ -455,18 +463,19 @@ public override void Update() {
455463
} break;
456464
case Microarchitecture.SandyBridge:
457465
case Microarchitecture.IvyBridge:
458-
case Microarchitecture.Haswell:
466+
case Microarchitecture.Haswell:
459467
case Microarchitecture.Broadwell:
460468
case Microarchitecture.Silvermont:
461469
case Microarchitecture.Skylake:
462-
case Microarchitecture.KabyLake:
470+
case Microarchitecture.KabyLake:
463471
case Microarchitecture.Goldmont:
464472
case Microarchitecture.GoldmontPlus:
465473
case Microarchitecture.CannonLake:
466474
case Microarchitecture.IceLake:
467475
case Microarchitecture.CometLake:
468476
case Microarchitecture.Tremont:
469-
case Microarchitecture.TigerLake: {
477+
case Microarchitecture.TigerLake:
478+
case Microarchitecture.AlderLake: {
470479
uint multiplier = (eax >> 8) & 0xff;
471480
coreClocks[i].Value = (float)(multiplier * newBusClock);
472481
} break;

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