@@ -222,6 +222,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
222222 tjMax = GetTjMaxFromMsr ( ) ;
223223 break ;
224224
225+ case 0xC5 : // Intel Core Ultra 9 200 Series ArrowLake
225226 case 0xC6 : // Intel Core Ultra 7 200 Series ArrowLake
226227 _microArchitecture = MicroArchitecture . ArrowLake ;
227228 tjMax = GetTjMaxFromMsr ( ) ;
@@ -234,7 +235,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
234235 case 0x8F : // Intel Xeon W5-3435X // SapphireRapids
235236 _microArchitecture = MicroArchitecture . SapphireRapids ;
236237 tjMax = GetTjMaxFromMsr ( ) ;
237- break ;
238+ break ;
238239 case 0x96 : // Intel Celeron ElkhartLake
239240 _microArchitecture = MicroArchitecture . ElkhartLake ;
240241 tjMax = GetTjMaxFromMsr ( ) ;
@@ -306,7 +307,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
306307 case MicroArchitecture . Silvermont :
307308 case MicroArchitecture . Skylake :
308309 case MicroArchitecture . TigerLake :
309- case MicroArchitecture . SapphireRapids :
310+ case MicroArchitecture . SapphireRapids :
310311 case MicroArchitecture . ElkhartLake :
311312 case MicroArchitecture . Tremont :
312313 if ( Ring0 . ReadMsr ( MSR_PLATFORM_INFO , out eax , out uint _ ) )
@@ -424,7 +425,7 @@ MicroArchitecture.SandyBridge or
424425 MicroArchitecture . Silvermont or
425426 MicroArchitecture . Skylake or
426427 MicroArchitecture . TigerLake or
427- MicroArchitecture . SapphireRapids or
428+ MicroArchitecture . SapphireRapids or
428429 MicroArchitecture . ElkhartLake or
429430 MicroArchitecture . Tremont )
430431 {
@@ -630,7 +631,7 @@ public override void Update()
630631 case MicroArchitecture . Silvermont :
631632 case MicroArchitecture . Skylake :
632633 case MicroArchitecture . TigerLake :
633- case MicroArchitecture . SapphireRapids :
634+ case MicroArchitecture . SapphireRapids :
634635 case MicroArchitecture . ElkhartLake :
635636 case MicroArchitecture . Tremont :
636637 _coreClocks [ i ] . Value = ( float ) ( ( ( eax >> 8 ) & 0xff ) * newBusClock ) ;
@@ -724,7 +725,7 @@ private enum MicroArchitecture
724725 TigerLake ,
725726 Tremont ,
726727 RaptorLake ,
727- SapphireRapids ,
728+ SapphireRapids ,
728729 ElkhartLake ,
729730 Unknown
730731 }
0 commit comments