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Intel Ultra 9 200 Series ArrowLake Added (#1630)
1 parent 24b5e04 commit 2d4f2cf

1 file changed

Lines changed: 6 additions & 5 deletions

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LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
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tjMax = GetTjMaxFromMsr();
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break;
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case 0xC5: // Intel Core Ultra 9 200 Series ArrowLake
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case 0xC6: // Intel Core Ultra 7 200 Series ArrowLake
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_microArchitecture = MicroArchitecture.ArrowLake;
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tjMax = GetTjMaxFromMsr();
@@ -234,7 +235,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
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case 0x8F: // Intel Xeon W5-3435X // SapphireRapids
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_microArchitecture = MicroArchitecture.SapphireRapids;
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tjMax = GetTjMaxFromMsr();
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break;
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break;
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case 0x96: // Intel Celeron ElkhartLake
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_microArchitecture = MicroArchitecture.ElkhartLake;
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tjMax = GetTjMaxFromMsr();
@@ -306,7 +307,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
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case MicroArchitecture.Silvermont:
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case MicroArchitecture.Skylake:
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case MicroArchitecture.TigerLake:
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case MicroArchitecture.SapphireRapids:
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case MicroArchitecture.SapphireRapids:
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case MicroArchitecture.ElkhartLake:
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case MicroArchitecture.Tremont:
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if (Ring0.ReadMsr(MSR_PLATFORM_INFO, out eax, out uint _))
@@ -424,7 +425,7 @@ MicroArchitecture.SandyBridge or
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MicroArchitecture.Silvermont or
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MicroArchitecture.Skylake or
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MicroArchitecture.TigerLake or
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MicroArchitecture.SapphireRapids or
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MicroArchitecture.SapphireRapids or
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MicroArchitecture.ElkhartLake or
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MicroArchitecture.Tremont)
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{
@@ -630,7 +631,7 @@ public override void Update()
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case MicroArchitecture.Silvermont:
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case MicroArchitecture.Skylake:
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case MicroArchitecture.TigerLake:
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case MicroArchitecture.SapphireRapids:
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case MicroArchitecture.SapphireRapids:
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case MicroArchitecture.ElkhartLake:
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case MicroArchitecture.Tremont:
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_coreClocks[i].Value = (float)(((eax >> 8) & 0xff) * newBusClock);
@@ -724,7 +725,7 @@ private enum MicroArchitecture
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TigerLake,
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Tremont,
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RaptorLake,
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SapphireRapids,
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SapphireRapids,
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ElkhartLake,
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Unknown
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}

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