@@ -230,10 +230,14 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
230230 case 0xBD : // Intel Core Ultra 5/7 200 Series LunarLake
231231 _microArchitecture = MicroArchitecture . LunarLake ;
232232 tjMax = GetTjMaxFromMsr ( ) ;
233- break ;
233+ break ;
234234 case 0x8F : // Intel Xeon W5-3435X // SapphireRapids
235235 _microArchitecture = MicroArchitecture . SapphireRapids ;
236236 tjMax = GetTjMaxFromMsr ( ) ;
237+ break ;
238+ case 0x96 : // Intel Celeron ElkhartLake
239+ _microArchitecture = MicroArchitecture . ElkhartLake ;
240+ tjMax = GetTjMaxFromMsr ( ) ;
237241 break ;
238242
239243 default :
@@ -301,8 +305,9 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
301305 case MicroArchitecture . SandyBridge :
302306 case MicroArchitecture . Silvermont :
303307 case MicroArchitecture . Skylake :
304- case MicroArchitecture . TigerLake :
305- case MicroArchitecture . SapphireRapids :
308+ case MicroArchitecture . TigerLake :
309+ case MicroArchitecture . SapphireRapids :
310+ case MicroArchitecture . ElkhartLake :
306311 case MicroArchitecture . Tremont :
307312 if ( Ring0 . ReadMsr ( MSR_PLATFORM_INFO , out eax , out uint _ ) )
308313 _timeStampCounterMultiplier = ( eax >> 8 ) & 0xff ;
@@ -418,8 +423,9 @@ MicroArchitecture.RocketLake or
418423 MicroArchitecture . SandyBridge or
419424 MicroArchitecture . Silvermont or
420425 MicroArchitecture . Skylake or
421- MicroArchitecture . TigerLake or
422- MicroArchitecture . SapphireRapids or
426+ MicroArchitecture . TigerLake or
427+ MicroArchitecture . SapphireRapids or
428+ MicroArchitecture . ElkhartLake or
423429 MicroArchitecture . Tremont )
424430 {
425431 _powerSensors = new Sensor [ _energyStatusMsrs . Length ] ;
@@ -623,8 +629,9 @@ public override void Update()
623629 case MicroArchitecture . SandyBridge :
624630 case MicroArchitecture . Silvermont :
625631 case MicroArchitecture . Skylake :
626- case MicroArchitecture . TigerLake :
627- case MicroArchitecture . SapphireRapids :
632+ case MicroArchitecture . TigerLake :
633+ case MicroArchitecture . SapphireRapids :
634+ case MicroArchitecture . ElkhartLake :
628635 case MicroArchitecture . Tremont :
629636 _coreClocks [ i ] . Value = ( float ) ( ( ( eax >> 8 ) & 0xff ) * newBusClock ) ;
630637 break ;
@@ -716,8 +723,9 @@ private enum MicroArchitecture
716723 Skylake ,
717724 TigerLake ,
718725 Tremont ,
719- RaptorLake ,
720- SapphireRapids ,
726+ RaptorLake ,
727+ SapphireRapids ,
728+ ElkhartLake ,
721729 Unknown
722730 }
723731
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