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Added support for Lunar Lake CPUs (#1520)
* Added support for Lunar Lake CPUs * Fixed a typo
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Lines changed: 16 additions & 7 deletions

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LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs

Lines changed: 16 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -220,13 +220,18 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
220220
case 0xA7: // Intel Core i5, i6, i7 11xxx (14nm) (Rocket Lake)
221221
_microArchitecture = MicroArchitecture.RocketLake;
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tjMax = GetTjMaxFromMsr();
223-
break;
224-
223+
break;
224+
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case 0xC6: // Intel Core Ultra 7 200 Series ArrowLake
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_microArchitecture = MicroArchitecture.ArrowLake;
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tjMax = GetTjMaxFromMsr();
228-
break;
229-
228+
break;
229+
230+
case 0xBD: // Intel Core Ultra 5/7 200 Series LunarLake
231+
_microArchitecture = MicroArchitecture.LunarLake;
232+
tjMax = GetTjMaxFromMsr();
233+
break;
234+
230235
default:
231236
_microArchitecture = MicroArchitecture.Unknown;
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tjMax = Floats(100);
@@ -272,7 +277,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
272277

273278
break;
274279
case MicroArchitecture.Airmont:
275-
case MicroArchitecture.AlderLake:
280+
case MicroArchitecture.AlderLake:
276281
case MicroArchitecture.ArrowLake:
277282
case MicroArchitecture.Broadwell:
278283
case MicroArchitecture.CannonLake:
@@ -284,6 +289,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
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case MicroArchitecture.IvyBridge:
285290
case MicroArchitecture.JasperLake:
286291
case MicroArchitecture.KabyLake:
292+
case MicroArchitecture.LunarLake:
287293
case MicroArchitecture.Nehalem:
288294
case MicroArchitecture.MeteorLake:
289295
case MicroArchitecture.RaptorLake:
@@ -387,7 +393,7 @@ public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(
387393
}
388394

389395
if (_microArchitecture is MicroArchitecture.Airmont or
390-
MicroArchitecture.AlderLake or
396+
MicroArchitecture.AlderLake or
391397
MicroArchitecture.ArrowLake or
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MicroArchitecture.Broadwell or
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MicroArchitecture.CannonLake or
@@ -399,6 +405,7 @@ MicroArchitecture.IceLake or
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MicroArchitecture.IvyBridge or
400406
MicroArchitecture.JasperLake or
401407
MicroArchitecture.KabyLake or
408+
MicroArchitecture.LunarLake or
402409
MicroArchitecture.MeteorLake or
403410
MicroArchitecture.RaptorLake or
404411
MicroArchitecture.RocketLake or
@@ -602,14 +609,15 @@ public override void Update()
602609
case MicroArchitecture.IvyBridge:
603610
case MicroArchitecture.JasperLake:
604611
case MicroArchitecture.KabyLake:
612+
case MicroArchitecture.LunarLake:
605613
case MicroArchitecture.MeteorLake:
606614
case MicroArchitecture.RaptorLake:
607615
case MicroArchitecture.RocketLake:
608616
case MicroArchitecture.SandyBridge:
609617
case MicroArchitecture.Silvermont:
610618
case MicroArchitecture.Skylake:
611619
case MicroArchitecture.TigerLake:
612-
case MicroArchitecture.Tremont:
620+
case MicroArchitecture.Tremont:
613621
_coreClocks[i].Value = (float)(((eax >> 8) & 0xff) * newBusClock);
614622
break;
615623
default:
@@ -690,6 +698,7 @@ private enum MicroArchitecture
690698
IvyBridge,
691699
JasperLake,
692700
KabyLake,
701+
LunarLake,
693702
Nehalem,
694703
NetBurst,
695704
MeteorLake,

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