Prepare for release

Author: olofk

NEWS

@@ -1,3 +1,31 @@
+1.3 2015-11-16 Olof Kindgren <olof.kindgren@gmail.com>
+======================================================
+* Add item to .core files to explicitly apply patches
+* Export FuseSoC dirs as env vars to external commands
+* Use relative paths everywhere
+* Always rebuild sim model, except when --keep is used
+* Prettify core-info output
+* Generate CAPI directly from section.py
+* Add more helpful data types to section members
+* Support multiple top-level testbenches
+* Add git provider
+* Add pgm option to ISE backend
+* Add support for Xilinx ISIM Simulator
+* Abort FuseSoC on scripts with non-zero return code
+* Run scripts from all core deps in simulations
+* Add parameter section (replaces plusargs)
+* Add support for Xilinx XSIM Simulator
+* + improved error handling, bug fixes and refactoring
+
+Contributors:
+Andrzej Radecki <ndrwrdck@gmail.com>
+Franck Jullien <franck.jullien@gmail.com>
+Jeffrey Esquivel S <jeff@estudiomanati.com>
+Leonardo Lessa <llessa@users.noreply.github.com>
+Lukas Rinderer <lukas@gastro-plan.at>
+Michael Gielda <mgielda@antmicro.com>
+Olof Kindgren <olof.kindgren@gmail.com>
+
 1.2 2015-02-24 Olof Kindgren <olof.kindgren@gmail.com>
 ======================================================
 * Allow files in core root to overlay files in cache

configure.ac

@@ -1,4 +1,4 @@
-AC_INIT([FuseSoC], [1.3-dev])
+AC_INIT([FuseSoC], [1.3])
 
 AM_INIT_AUTOMAKE([foreign])
 AM_PATH_PYTHON([2.7])