Commit 572c465
drm: rockchip: hdmi: check sink max_tmds_clock in mode_valid
If sink max TMDS clock < 340MHz, we think the mode pixel clock
greater than 340MHz should support YCbCr420, or it is a bad mode.
Change-Id: I9f53fa4f9875977ae0355b65d9ccd8a304558c5d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>1 parent e68ba0f commit 572c465
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