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Integ sp8 2x1p support 13042026 #258

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322fb79
Revert "drivres:misc:amd-apml: New APML device ID for SP8"
akky16 Apr 10, 2026
bc38641
Revert "drivres:misc:amd-apml: New APML device ID for SP7 AB"
akky16 Apr 10, 2026
5f70947
Revert "drivers: sbtsi: use static address mapped from PID"
akky16 Apr 10, 2026
da31ed3
Revert "drivers: sbrmi: use static address mapped from PID"
akky16 Apr 10, 2026
cfceadb
drivers: misc: amd-apml: Set device address using dynamic address
akky16 Jan 20, 2026
f959b0a
drivers: misc: amd-apml: Set device address using dynamic address
akky16 Jan 20, 2026
631f49e
arm64: dts: Add device tree for Venice A0 RMI/TSI dev
akky16 Apr 10, 2026
dcfc2ae
arm64: dts: Add device tree for APML devices for Venice
akky16 Apr 10, 2026
5be2c88
arm64: dts: Add device tree for APML devices for SP8
akky16 Apr 10, 2026
ca9cd49
misc: amd-apml: Add I3C device IDs
akky16 Apr 13, 2026
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20 changes: 20 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-congo.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -875,6 +875,26 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
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assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
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assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

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@modolaty modolaty Apr 28, 2026

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Congo does not support SP8 IDs

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@akky16 akky16 May 5, 2026

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will revert back the commit, add to the SP8 dts files

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
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10 changes: 10 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-eagle.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -872,6 +872,16 @@
i3c-scl-hz = <12500000>;
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
};
};

#ifdef I3C_HUB
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10 changes: 10 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-falcon.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -431,6 +431,16 @@
i3c-scl-hz = <12500000>;
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
};
};

#ifdef I3C_HUB
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23 changes: 23 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-hornbill.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -829,6 +829,11 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
Expand All @@ -844,12 +849,30 @@
i2c-scl-hz = <1000000>;
mctp-controller;

/* TSI SP8 2P */
sbtsi_p1_sp8: sbtsi@0,2240100011A {
reg = <0x0 0x224 0x0100011A>;
assigned-address = <0x48>;
};

sbrmi_p1_sp8: sbrmi@0,2240100111A {
reg = <0x0 0x224 0x0100111A>;
assigned-address = <0x38>;
dimm-ids = <0x80 0x90 0x81 0x91 0x82 0x92 0x83 0x93 0x84 0x94 0x85 0x95 0x86 0x96 0x87 0x97>;
};

/* TSI SP8 2x1P */
sbtsi_2x1p_p1_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2x1P */
sbrmi_2x1p_p1_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x38>;
dimm-ids = <0x80 0x90 0x81 0x91 0x82 0x92 0x83 0x93 0x84 0x94 0x85 0x95 0x86 0x96 0x87 0x97>;
};
};

#ifdef I3C_HUB
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20 changes: 20 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-kenya.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -565,6 +565,26 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

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@modolaty modolaty Apr 28, 2026

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Congo does not Support SP8

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@modolaty modolaty Apr 28, 2026

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I mean Kenya

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@akky16 akky16 May 5, 2026

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will revert back the commit, add to the SP8 dts files

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
68 changes: 68 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-morocco.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -943,6 +943,26 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand All @@ -964,6 +984,54 @@
i2c-scl-hz = <1000000>;
mctp-controller;

/* TSI Venice A0 2P */
sbtsi_p1_iod0: sbtsi@0,22401000118 {
reg = <0x0 0x224 0x01000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2P */
sbrmi_p1_iod0: sbrmi@0,22401001118 {
reg = <0x0 0x224 0x01001118>;
assigned-address = <0x38>;
};

/* TSI Venice A0 2X1P */
sbtsi_2x1p_p1_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2X1P */
sbrmi_2x1p_p1_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2P */
sbtsi_p1_iod0_AB: sbtsi@0,22401000119 {
reg = <0x0 0x224 0x01000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2P */
sbrmi_p1_iod0_AB: sbrmi@0,22401001119 {
reg = <0x0 0x224 0x01001119>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2x1P */
sbtsi_2x1p_p1_AB_iod0: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2x1P */
sbrmi_2x1p_p1_AB_iod0: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x38>;
};

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@modolaty modolaty Apr 28, 2026

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Morocco does not support Sp8 IDs

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@akky16 akky16 May 5, 2026

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will revert back the commit, add to the SP8 dts files

scoob_2x1p_p1: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
68 changes: 68 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-nigeria.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -714,6 +714,26 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

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@modolaty modolaty Apr 28, 2026

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Nigeria does not support SP8 IDs

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@akky16 akky16 May 5, 2026

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will revert back the commit, add to the SP8 dts files

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand All @@ -735,6 +755,54 @@
i2c-scl-hz = <1000000>;
mctp-controller;

/* TSI Venice A0 2P */
sbtsi_p1_iod0: sbtsi@0,22401000118 {
reg = <0x0 0x224 0x01000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2P */
sbrmi_p1_iod0: sbrmi@0,22401001118 {
reg = <0x0 0x224 0x01001118>;
assigned-address = <0x38>;
};

/* TSI Venice A0 2X1P */
sbtsi_2x1p_p1_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2X1P */
sbrmi_2x1p_p1_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2P */
sbtsi_p1_iod0_AB: sbtsi@0,22401000119 {
reg = <0x0 0x224 0x01000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2P */
sbrmi_p1_iod0_AB: sbrmi@0,22401001119 {
reg = <0x0 0x224 0x01001119>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2x1P */
sbtsi_2x1p_p1_AB_iod0: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2x1P */
sbrmi_2x1p_p1_AB_iod0: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x38>;
};

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@modolaty modolaty Apr 28, 2026

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Nigeria does not Support SP8

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@akky16 akky16 May 5, 2026

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will revert back the commit

scoob_2x1p_p1: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
34 changes: 34 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-seagull.dts
View file
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Original file line number Diff line number Diff line change
Expand Up @@ -554,6 +554,16 @@
i3c-scl-hz = <12500000>;
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
};
};

&i3c5 {
Expand All @@ -563,6 +573,30 @@
i3c-scl-hz = <12500000>;
i2c-scl-hz = <1000000>;
mctp-controller;

/* TSI SP8 2P */
sbtsi_p1_sp8: sbtsi@0,2240100011A {
reg = <0x0 0x224 0x0100011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2P */
sbrmi_p1_sp8: sbrmi@0,2240100111A {
reg = <0x0 0x224 0x0100111A>;
assigned-address = <0x38>;
};

/* TSI SP8 2x1P */
sbtsi_2x1p_p1_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2x1P */
sbrmi_2x1p_p1_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x38>;
};
};

#ifdef I3C_HUB
Expand Down
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