Commit 342c4f5
Ryzen 9000 Core Frequency Bugfix (#1548)
* Ryzen 9000 Core Frequency Bugfix
Zen5 (Ryzen 9000) has a changed register mapping for readout core frequency
* Update Ryzen 9000 and Core Clock
* fixed Package Power and Core power Calculation, use ESU for power scaling
* Changed DateTime.Now to UtcNow (better performance)
* Added Effective core clock
* Added Average Core clock and Average effective clock
* Remove Effective clock from SMU
Core effective clock is now calculated in Amd17Cpu/Core
* Fix Clock Ratio calculation.
Ratio > 1 is not possible
* Update Amd17Cpu.cs
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>1 parent 8d612d2 commit 342c4f5
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