AD7768 upstream

[jansunil]

PR Description

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PR Type

• Bug fix (a change that fixes an issue)
• New feature (a change that adds new functionality)
• Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

• I have conducted a self-review of my own code changes
• I have compiled my changes, including the documentation
• I have tested the changes on the relevant hardware
• I have updated the documentation outside this repo accordingly
• I have provided links for the relevant upstream lore

[ahmetalincak]

Hey @jansunil. Is it possible to add a custom property to the channels for enabling/disabling it over dt overlay? For example, 'adi,enable' or 'adi,status'. It would be great to be able to manage channels without removing the whole node from dt. @nunojsa any thoughts?

[jansunil]

Changlog v1:
1) Update maintainers file to include an entry for the DT binding header
2) Move required section in the adi,ad7768.yaml after pattern properties
3) Drop '-v' in the adi,common-mode-output-v property
4) Add a better doxygen description for the CRC enable/disable function
5) Update commit message for the adi-axi-adc.c file changes
6) Update kconfig entries to use one liners wherever necessary, remove wrong addition of REGMAP_SPI in config AXI ADC
7) Use pm_ptr for pm ops
8) Modify incorrect indentation in the ad7768_driver definition
9) Remove trailing comma in the last entry in ad7768_of_match[] and ad7768_spi_id[] declaration, add spaces between {}
10) Use scoped guards from cleanup.h in relevant instances in the driver
11) Add regmap_config member in the chip_info
12) Use devm_mutex_init and devm_err_probe wherever applicable
13) Remove initialization fro prebuf1_mask_val and prebuf2_mask_val
14) Use static_assert in place of BUILD_BUG_ON()
15) Add helper functions for IIO_CHAN_INFO_CALIBBIAS and IIO_CHAN_INFO_CALIBSCALE cases
16) Add reset framework with GPIO based fallback
Wrap lines to 80 column width wherever applicable

[ahmetalincak]

Hey @nunojsa - could you please have a look this one?

[nunojsa]

Hey @nunojsa - could you please have a look this one?

Sure. I asked first for llm-review. Let's see what comes out after that.

[github-actions]

LLM review

This series adds support for the AD7768/AD7768-4 8/4-channel simultaneous-sampling
Sigma-Delta ADC, along with CRC enable/disable support in the IIO backend infrastructure
and the ADI AXI ADC backend.

run: 25312690089

---

3f48a628c21e - drivers: iio: adc: AD7768 Driver support

Bug 1 — GPIO reset pulse broken (critical)

gpiod_set_value_cansleep() is called with GPIOD_OUT_HIGH and GPIOD_OUT_LOW
enum values. These are flags for devm_gpiod_get(), not integer values for
gpiod_set_value_cansleep(). Their actual integer values are 7 and 3
respectively — both non-zero. Since gpiod_set_raw_value_commit() takes a
bool, both evaluate to true, so the GPIO is never driven low and the
hardware reset pulse is never asserted. The device is left uninitialized.

// drivers/iio/adc/ad7768.c:1172
gpiod_set_value_cansleep(st->reset_gpio, GPIOD_OUT_HIGH); // passes 7
gpiod_set_value_cansleep(st->reset_gpio, GPIOD_OUT_LOW);  // passes 3 — still HIGH!

Fix: use integer literals 1 and 0.

Bug 2 — Missing IS_ERR check on reset_ctrl

devm_reset_control_get_optional_exclusive() can return ERR_PTR on error.
The driver only checks !st->reset_ctrl (NULL check), so an ERR_PTR passes
through and is later dereferenced in reset_control_assert(), causing a crash.

// drivers/iio/adc/ad7768.c:1213-1214
st->reset_ctrl = devm_reset_control_get_optional_exclusive(dev, NULL);
if (!st->reset_ctrl) {  // missing IS_ERR() check

Bug 3 — CRC never actually enabled (critical)

AD7768_INTERFACE_CFG_CRC_SELECT is defined as 0x01, but the CRC_SELECT
field occupies bits [3:2] (GENMASK(3,2) = 0x0C). The call:

regmap_update_bits(regmap, INTERFACE_CFG, GENMASK(3,2), 0x01);
// Effective write: (current & ~0x0C) | (0x01 & 0x0C) = (current & ~0x0C) | 0x00
// Result: CRC DISABLED

Per the AD7768 datasheet Table 45 (Register 0x07), CRC_SELECT = 0b01 (every 4
samples) requires bits [3:2] = 0b01, i.e. value 0x04.

Fix: #define AD7768_INTERFACE_CFG_CRC_SELECT FIELD_PREP(GENMASK(3, 2), 0x01)

Bug 4 — Power mode settings erased on resume

ad7768_runtime_suspend() and ad7768_runtime_resume() use regmap_write()
to set/clear the SLEEP_MODE bit (bit 7), which overwrites the entire
POWER_MODE register. This destroys the POWER_MODE[5:4] and MCLK_DIV[1:0]
fields configured at probe time, leaving the device in the wrong power mode
after resume.

Fix: replace regmap_write() with regmap_update_bits(..., AD7768_SLEEP_MODE_MSK, val).

Warning — Kconfig hard-dependency on ADI_AXI_ADC

The driver uses the generic IIO backend API and should not depend on a specific
backend implementation. Use select IIO_BACKEND instead of depends on ADI_AXI_ADC,
following the pattern of AD7779.

Warning — MAINTAINERS file patterns out of alphabetical order (checkpatch)

include/ entry appears before drivers/; correct order is
Documentation/ → drivers/ → include/.

---

d40fe7709397 - Documentation: iio: Add AD7768 Documentation

Warning — index.rst insertion out of alphabetical order

ad7768 is inserted between ad7380 and ad7606, but numerically 7768 > 7606 > 7625.
Correct position: between ad7625 and ad7944.

---

CI Warnings

checkpatch.pl --strict on 3f48a628c21e reports:

WARNING: Misordered MAINTAINERS entry - list file patterns in alphabetic order
CHECK: Macro argument reuse 'ch' - possible side-effects? (__AD7768_4_REG_MAP)
CHECK: Alignment should match open parenthesis (4 occurrences)

---

Verification data

The AD7768/AD7768-4 datasheet (ad7768-ad7768-4.pdf) was fetched from the Analog
Devices docling mirror and used to verify:

• Register 0x04 (POWER_MODE): POWER_MODE[5:4] encoding (00=LP, 10=Median, 11=Fast)
  and MCLK_DIV[1:0] (00=/32, 10=/8, 11=/4) — driver mapping is correct.
• Register 0x07 (Interface Configuration): CRC_SELECT[3:2] field — confirmed
  the 0x01 value bug (should be 0x04).
• RESET pin: active-LOW with internal pull-up to IOVDD, minimum low pulse
  width = 2×tMCLK — confirms the GPIO reset sequence direction is correct once
  the value bug is fixed.

Driver built clean (no errors, no warnings) with gcc_aarch64 and gcc_arm compilers
after enabling COMPILE_TEST, SPI_MASTER, ADI_AXI_ADC=m, AD7768=m.

---

Suggested patches

Apply the suggested patches with:

cd path/to/repository
export GITHUB_TOKEN=ghp_***
apply-patches --repo=analogdevicesinc/linux 25312690089

Install instructions

The following one-liner installs the script if not present already:

grep "/apply-patches.sh" ~/.bashrc ||  { curl "https://raw.githubusercontent.com/analogdevicesinc/doctools/refs/heads/main/ci/scripts/apply-patches.sh"    -o ~/.local/bin/apply-patches.sh &&  echo "source ~/.local/bin/apply-patches.sh" >> ~/.bashrc ; source ~/.bashrc ; }

More information at AI Usage.

[jansunil]

Changelog after LLM Review fixes:

1. Fix issue with CRC select configuration
2. Changed to regmap_update_bits() to only modify SLEEP_MODE bit [7]
3. Removed dependency in kconfig on the ADI_AXI_ADC and added IIO_BACKEND select
4. Fixed alignment of function with respect to open paranthesis
5. Fixed checkpatch warnings on MAINTAINERS file reg. alphabetical order of entries
6. Alphabetically ordered entries in the index.rst
7. Added 1, 0 as states for GPIO set and reset