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Adds new STM32 Bare support for Hash, SAES/AES and PKA #10395

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Adds new STM32 Bare support for Hash, SAES/AES and PKA #10395

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57 changes: 56 additions & 1 deletion wolfcrypt/src/aes.c
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Original file line number Diff line number Diff line change
Expand Up @@ -227,6 +227,10 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits
static WARN_UNUSED_RESULT int wc_AesEncrypt(
Aes* aes, const byte* inBlock, byte* outBlock)
{
#ifdef WOLFSSL_STM32_BARE
/* Bare-metal driver handles mutex, clock and key/IV internally. */
return wc_Stm32_Aes_Ecb(aes, outBlock, inBlock, WC_AES_BLOCK_SIZE, 1);
#else
int ret = 0;
#ifdef WOLFSSL_STM32_CUBEMX
CRYP_HandleTypeDef hcryp;
Expand Down Expand Up @@ -367,6 +371,7 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits
wc_Stm32_Aes_Cleanup();

return ret;
#endif /* !WOLFSSL_STM32_BARE */
}
#endif /* WOLFSSL_AES_DIRECT || HAVE_AESGCM || HAVE_AESCCM */

Expand All @@ -375,6 +380,9 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits
static WARN_UNUSED_RESULT int wc_AesDecrypt(
Aes* aes, const byte* inBlock, byte* outBlock)
{
#ifdef WOLFSSL_STM32_BARE
return wc_Stm32_Aes_Ecb(aes, outBlock, inBlock, WC_AES_BLOCK_SIZE, 0);
#else
int ret = 0;
#ifdef WOLFSSL_STM32_CUBEMX
CRYP_HandleTypeDef hcryp;
Expand Down Expand Up @@ -521,6 +529,7 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits
wc_Stm32_Aes_Cleanup();

return ret;
#endif /* !WOLFSSL_STM32_BARE */
}
#endif /* WOLFSSL_AES_DIRECT */
#endif /* HAVE_AES_DECRYPT */
Expand Down Expand Up @@ -5575,7 +5584,34 @@ int wc_AesSetIV(Aes* aes, const byte* iv)
#ifdef HAVE_AES_CBC
#if defined(STM32_CRYPTO)

#ifdef WOLFSSL_STM32U5_DHUK
#ifdef WOLFSSL_STM32_BARE
int wc_AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
{
#ifdef WOLFSSL_AES_CBC_LENGTH_CHECKS
if (sz % WC_AES_BLOCK_SIZE) {
return BAD_LENGTH_E;
}
#endif
if (sz == 0) {
return 0;
}
return wc_Stm32_Aes_Cbc(aes, out, in, sz, 1);
}
#ifdef HAVE_AES_DECRYPT
int wc_AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
{
#ifdef WOLFSSL_AES_CBC_LENGTH_CHECKS
if (sz % WC_AES_BLOCK_SIZE) {
return BAD_LENGTH_E;
}
#endif
if (sz == 0) {
return 0;
}
return wc_Stm32_Aes_Cbc(aes, out, in, sz, 0);
}
#endif /* HAVE_AES_DECRYPT */
#elif defined(WOLFSSL_STM32U5_DHUK)
int wc_AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
{
int ret = 0;
Expand Down Expand Up @@ -6955,6 +6991,11 @@ int wc_AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)

int wc_AesCtrEncryptBlock(Aes* aes, byte* out, const byte* in)
{
#ifdef WOLFSSL_STM32_BARE
/* CTR per-block transform: ECB-encrypt the counter (passed in
* 'in'); aes.c handles counter increment and XOR with plaintext. */
return wc_Stm32_Aes_Ecb(aes, out, in, WC_AES_BLOCK_SIZE, 1);
#else
int ret = 0;
#ifdef WOLFSSL_STM32_CUBEMX
CRYP_HandleTypeDef hcryp;
Expand Down Expand Up @@ -7065,6 +7106,7 @@ int wc_AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
wolfSSL_CryptHwMutexUnLock();
wc_Stm32_Aes_Cleanup();
return ret;
#endif /* !WOLFSSL_STM32_BARE */
}


Expand Down Expand Up @@ -10141,6 +10183,15 @@ int wc_AesGcmEncrypt(Aes* aes, byte* out, const byte* in, word32 sz,
authIn, authInSz);
#endif

#if defined(WOLFSSL_STM32_BARE) && defined(STM32_CRYPTO)
ret = wc_Stm32_Aes_Gcm(aes, out, in, sz, iv, ivSz,
authTag, authTagSz,
authIn, authInSz, 1 /* enc */);
if (ret != WC_NO_ERR_TRACE(CRYPTOCB_UNAVAILABLE))
return ret;
/* fall through to SW GCM (still uses HW AES via wc_AesEncrypt) */
#endif /* WOLFSSL_STM32_BARE && STM32_CRYPTO */

#ifdef STM32_CRYPTO_AES_GCM
return wc_AesGcmEncrypt_STM32(
aes, out, in, sz, iv, ivSz,
Expand Down Expand Up @@ -10870,6 +10921,10 @@ int wc_AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,

#endif

/* BARE: GCM decrypt always uses SW path (with HW AES blocks via
* wc_AesEncrypt). Encrypt is HW-accelerated above; decrypt + tag
* verification stays in well-tested SW for now. */

#ifdef STM32_CRYPTO_AES_GCM
/* The STM standard peripheral library API's doesn't support partial blocks */
return wc_AesGcmDecrypt_STM32(
Expand Down
21 changes: 17 additions & 4 deletions wolfcrypt/src/ecc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -286,8 +286,12 @@ ECC Curve Sizes:
#if !defined(WOLFSSL_ATECC508A) && !defined(WOLFSSL_ATECC608A) && \
!defined(WOLFSSL_CRYPTOCELL) && !defined(WOLFSSL_SILABS_SE_ACCEL) && \
!defined(WOLFSSL_KCAPI_ECC) && !defined(WOLFSSL_SE050) && \
!defined(WOLFSSL_XILINX_CRYPT_VERSAL) && !defined(WOLFSSL_STM32_PKA) && \
!defined(WOLFSSL_XILINX_CRYPT_VERSAL) && \
!(defined(WOLFSSL_STM32_PKA) && !defined(WOLFSSL_STM32_BARE)) && \
!defined(WOLFSSL_PSOC6_CRYPTO)
/* WOLFSSL_STM32_BARE+PKA still uses the SW ECDSA helper paths
* (sign/verify) since the bare-metal driver only implements ECCMul
* HW; the SP-less SW ECDSA fallback then drives that HW. */
#undef HAVE_ECC_VERIFY_HELPER
#define HAVE_ECC_VERIFY_HELPER
#endif
Expand Down Expand Up @@ -6947,7 +6951,12 @@ static int deterministic_sign_helper(const byte* in, word32 inlen, ecc_key* key)
#endif /* WOLFSSL_ECDSA_DETERMINISTIC_K ||
WOLFSSL_ECDSA_DETERMINISTIC_K_VARIANT */

#if defined(WOLFSSL_STM32_PKA)
/* Under WOLFSSL_STM32_BARE the bare-metal PKA driver implements only
* ECCMul HW (the building block used by ECDH and the SP-less SW ECDSA
* path). HW ECDSA sign/verify is intentionally not wired up in v1 of
* the bare driver -- fall back to the standard SW ECDSA which itself
* calls wc_ecc_mulmod_ex2() (HW-accelerated). */
#if defined(WOLFSSL_STM32_PKA) && !defined(WOLFSSL_STM32_BARE)
int wc_ecc_sign_hash_ex(const byte* in, word32 inlen, WC_RNG* rng,
ecc_key* key, mp_int *r, mp_int *s)
{
Expand Down Expand Up @@ -8751,7 +8760,8 @@ int wc_ecc_verify_hash(const byte* sig, word32 siglen, const byte* hash,

#ifndef WOLF_CRYPTO_CB_ONLY_ECC

#if !defined(WOLFSSL_STM32_PKA) && !defined(WOLFSSL_PSOC6_CRYPTO) && \
#if !(defined(WOLFSSL_STM32_PKA) && !defined(WOLFSSL_STM32_BARE)) && \
!defined(WOLFSSL_PSOC6_CRYPTO) && \
!defined(WOLF_CRYPTO_CB_ONLY_ECC)
static int wc_ecc_check_r_s_range(ecc_key* key, mp_int* r, mp_int* s)
{
Expand Down Expand Up @@ -9267,7 +9277,10 @@ static int ecc_verify_hash(mp_int *r, mp_int *s, const byte* hash,
int wc_ecc_verify_hash_ex(mp_int *r, mp_int *s, const byte* hash,
word32 hashlen, int* res, ecc_key* key)
{
#if defined(WOLFSSL_STM32_PKA)
#if defined(WOLFSSL_STM32_PKA) && !defined(WOLFSSL_STM32_BARE)
/* See comment above wc_ecc_sign_hash_ex(): BARE uses SW ECDSA
* verify which internally accelerates the scalar muls via the
* bare-metal HW wc_ecc_mulmod_ex2(). */
return stm32_ecc_verify_hash_ex(r, s, hash, hashlen, res, key);
#elif defined(WOLFSSL_PSOC6_CRYPTO)
return psoc6_ecc_verify_hash_ex(r, s, hash, hashlen, res, key);
Expand Down
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